The insatiable drive towards higher performance and integration levels for semiconductor devices and electronics leads to adopting multi-die systems and chiplet-based designs to extend Moore’s Law towards “More than Moore.” Traditional monolithic chip designs cannot meet the constraints of the escalating demands for more complex, high-performing computing systems.
Arteris plays a pivotal role in this transformation by enabling interoperability and efficient communication among disparate chiplets. Connecting through our ecosystem partners that provide the physical connections between chiplets using the Universal Chiplet Interconnect Express™ (UCIe), Bunch of Wires (BoW), or proprietary connections, our Network-on-Chip (NoC) technology facilitates a seamless data flow between chiplets, ensuring that developers meet target performance, latency, and power consumption despite the complexity of chiplet-based designs.
Key Benefits
Interoperability
Connect to industry-leading die-to-die PHY connections using their digital controllers using standard interfaces like CHI and AXI.
Bandwidth
Increase on-chip and off-chip bandwidth with HBM2 and multichannel memory support, multicast/broadcast writes, VC-Link™ Virtual Channels, and source-synchronous communications.
Low Power
Fewer wires and fewer gates consume less power, breaking communication paths into smaller segments allows to power only active segments, and simple internal protocol allows aggressive clock gating.
Standards
From a system design perspective, choosing the proper NoC protocol for the die-to-die data transport is critical to meeting performance, latency, and power requirements. Providers of the physical connections typically deliver PHYs and Controllers, including Link Layers that carry the raw Flow Control Units (FLITs) from die to die.
Arteris already works with partners like Synopsys, Cadence, Alphawave, Blue Cheetah Analog, Innosilicon, and others to align on NoC to Controller/PHY interfaces. In addition, Arteris actively participates in the related standardization efforts. Specifically, Arteris actively engages in the following standardization efforts:
- Arm AMBA (Advanced Microcontroller Bus Architecture)
- CXL Consortium (Compute Express Link)
- Open Compute Project ODSA Project (Bunch of Wires)
- PCI-SIG (Peripheral Component Interconnect Express)
- UCIe Consortium (Universal Chiplet Interface)
Products
- Enabling the RISC-V and Chiplet Era Through Accelerated Network-on-Chip (NoC) Development
- Customers
- Articles
- Extending network-on-chip (NoC) technology to chiplets | EDN
- Automotive Relationships Shifting With Chiplets | Semiconductor Engineering
- Are You Ready for the Chiplet Age? | EE Journal
- Chiplet Security Risks Underestimated | Semiconductor Engineering
- Many Chiplet Challenges Ahead | Semiconductor Engineering
- Chiplets For The Masses | Semiconductor Engineering