Enabling SoC Developers to Create Efficient NoCs
The world’s #1 on-chip fabric is used by the world’s top semiconductor design teams as the backbone on-chip communications for chips targeting the fastest growing markets.
Arteris FlexWay™ 5 network-on-chip (NoC) IP is particularly well suited to cost-efficient, low-power Internet-of-Things (IoT) edge devices and microcontrollers (MCUs).
A Complete Network-On-Chip Product
Everything design teams need to create the world’s best SoCs, faster
Flexible Topologies
FlexWay is generated from simple elementary components which are combined by a powerful set of algorithms and an intuitive GUI, making it possible to build the optimal topology for your embedded application.
Small to Medium SoCs
FlexWay supports simple to medium-complexity designs and easily scales efficiently between the two, containing only the optimum configuration required.
Huge Bandwidth
FlexWay is uncompromising in how it drives performant on-chip dataflow despite it’s power efficient design.
FlexWay Key Features
- Multi-clock/power/voltage domains and power management with unit-level clock gating
- Multi-protocol support including AMBA 5 with QoS bandwidth regulator and limiter
- Integrated SystemC simulation & UVM verification support
- Import and Export to Magillem tools
- AMBA 5 support of DVM 8.1 (Device Virtual Messaging)
- On-chip performance monitoring and debug
- Debug and trace with ATB 128b and timestamps
Explore additional features of FlexWay, download the datasheet.
Efficient Transport of Data Through the SoC
Arteris CodaCache® last-level cache
- Ideal for NoC applications with data re-use
- Improves overall SoC latency and power
Learn about CodaCache
NoC Integration Automated Flow
Automated flow to leverage SoC connectivity information:
- Improved productivity with reduced process
- Better quality with early errors detections thanks to the checkers
Learn about Magillem Connectivity and Magillem Registers
FlexWay Product Benefits
Easy Configuration
Through the intuitive FlexWay UI
Automated Verification
Saving hundreds of hours of work versus manual verification test benches
Lower Power Consumption
Advanced power management through clock gating, DVFS and GALS
Smaller Die Area
Fewer wires using optimal NoC transport layer
Read more about why we are unique on our NoC Technology page.
FlexWay Product Options
Seamlessly integrated extensions to the base FlexWay feature set
Product Comparison Table
| Category | Features | FlexWay | FlexNoC | FlexGen |
|---|---|---|---|---|
| Target Audience and Scale | Smaller-scale MCU SoCs | ✓ | ✓ | ✓ |
| Small-medium scale SoCs | ✓ | ✓ | ||
| Large scale SoCs | ✓ | ✓ | ||
| Instances Per Design | Single NoC instance | ✓ | ✓ | ✓ |
| Multiple NoC instances | ✓ | ✓ | ||
| Network Interface Units (NIUs) | Up to 50 NIUs | ✓ | ✓ | ✓ |
| Up to 200 NIUs | ✓ | ✓ | ||
| 200+ NIUs | with XL option | with XL option | ||
| Compatibility | ACE-Lite, AXI, AHB, APB, OCP, PIF, AMBA5 | ✓ | ✓ | ✓ |
| Smart NoC Automation | Topology generation with minimum wire length | ✓ | ||
| Scripting-driven regular topology creation | ✓ | |||
| Incremental design capability | ✓ | |||
| Physical Awareness | Automatic timing closure assistance | ✓ | ✓ | |
| Floorplan visualization | ✓ | ✓ | ||
| Advanced Scalability | NIU tiling | with XL option | with XL option | |
| Mesh topology editor | with XL option | with XL option | ||
| Write broadcast stations | with XL option | with XL option | ||
| Virtual channel links | with XL option | with XL option | ||
| Source synchronous asynchronous bridges | with XL option | with XL option | ||
| Up to 1024 bits data bus | with XL option | with XL option | ||
| 512 pending transaction support | with XL option | with XL option | ||
| Optimizations | Optimization for performance, area and wire length | ✓ | ||
| Advanced Quality of Service (QoS) | ✓ | ✓ | ✓ | |
| Power management and security | ✓ | ✓ | ✓ | |
| Address and data protection schemes | ✓ | ✓ | ✓ | |
| Advanced in-circuit debug features | ✓ | ✓ | ✓ | |
| Multi-cycle SRAM support | ✓ | ✓ | ✓ | |
| Floorplan visualization | ✓ | ✓ | ||
| Add-on Options | Memory Re-order Buffer option | ✓ | ✓ | ✓ |
| Reliability option | ✓ | ✓ | ✓ | |
| Safety (up to ISO 26262 ASIL D) option | ✓ | ✓ | ✓ | |
| Advanced Scalability (XL) option | ✓ | ✓ | ||
| Markets | Automotive, Communications, Consumer Electronics, Enterprise Computing and Industrial Markets | ✓ | ✓ | ✓ |
Arteris is the proven industry standard for system IP with responsive support, and deploying their technology guaranteed we met our performance requirements and aggressive timelines, Arteris FlexWay interconnect IP allowed us to close timing smoothly on a complex, multicore machine learning architecture. We look forward to working together on the next project.
Axelera AI
Giuseppe Garcea, Director of silicon and co-founder at Axelera AI
