XL and 2XL Options for FlexGen and FlexNoC
Enhance scalability and flexibility with automated topology creation
The XL and 2XL Options for FlexGen® and FlexNoC® automatically generate interconnect topologies for AI, deep neural networks (DNN), and machine learning (ML) systems. This helps eliminate challenges related to:
- Scalability
- Latency
- Data communication efficiency
SoC architects can edit generated topologies and optimize each network.
These options also expand the number of NoC initiators and targets, enabling the integration of a larger number of IP blocks and components within the system to ensure the seamless integration of diverse functionalities.
Advantages
Optimize system performance with higher data throughput with XL and 2XL
Flexible topologies
Create highly scalable mesh topologies.
Small to large SoCs
Efficiently span long distances across huge chips.
Higher bandwidth
Increase on-chip and off-chip bandwidth.
XL and 2XL Options key features
- Mesh-based interconnect generation
- Expanded number of NoC initiators and targets
- Broadcast links, virtual channels, and source-synchronous communications
- Data widths up to 1024 bits for the XL option and up to 2048 bits for the 2XL option
- High Bandwidth Memory (HBM) support, such as HBM2/HBM2E/HBM3
- Multichannel memory support
- 512 pending transaction support
XL and 2XL Options benefits
Advanced scalability and flexibility
Mesh-based interconnect generation addresses modern design needs.
Seamless IP blocks and components integration
Full integration leads to optimized system functionality.
Enhanced communication efficiency
Options help improve overall system performance and smooth operation, even in highly interconnected designs.
Increased data widths for higher data volumes
Improved system performance and accelerated data-intensive computations handle increased data movement needs.
High bandwidth memory (e.g. HBM2/HBM2E/HBM3)
The system’s ability to handle large amounts of data is enhanced, resulting in improved performance.