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When I speak to semiconductor product managers, directors and VPs, one of the questions I often ask is, “How much does it cost you if your chip is one month late?” ...

As featured in: I’ve been hearing the term “IP subsystem” lately, and it seems to be the latest newfangled buzz word in the SoC semiconductor and IP industry, second only to “virtualization.” Much of the context for this growi...

As featured in: As engineers, we view transaction protocols as simply a language to be able to communicate information from one block of system-on-chip (SoC) IP to another block. However, if you look at transaction protocols from an eco...

Today in the IP and EDA business, I hear “knock” all the time, except people mean “NoC.” It seems everybody wants a NoC, or wants to offer you a NoC. I’m here to tell you that NoC is not a noun....

TI has placed extensive information on their new OMAP5430 and OMAP5432 processors on their web page....

The 3 evils of wire routing congestion are poor performance, longer schedules, and lower yields...