Blog

It may seem strange to link two interchip interface standards to the future of 3D integrated circuits, but please bear with me for a few minutes. I hope to prove that the learning from today will impact how we design SoCs in the near future...

Samsung’s announcement that it is investing a company-record $42B in 2012 for technology development came as a bit of a shock to many in the financial and technology press. The size of this investment dwarfs that of any other company I kn...

  Two new options for interchip connectivity are available today that enable sharing a DRAM memory between two chips for data and programs. These standards, called MIPI Low Latency Interface (MIPI LLI) and Chip-to-Chip (C2C), are prim...

Provides compatibility with ARM AMBA 4 CCI-400 and Cortex-A15 cores while reducing routing congestion, easing timing closure and increasing performance...

Gartner analyst Jim Tully’s assessment that network on chip (NoC) technology will be “mainstream” in two to five years is an acknowledgement of the technical and commercial success NoC interconnect IP has had in the consumer elect...

When I speak to semiconductor product managers, directors and VPs, one of the questions I often ask is, “How much does it cost you if your chip is one month late?” ...