The optional Arteris® FlexNoC® AI Package automatically generates mesh, ring and torus interconnect topologies. Unlike black box compiler approaches, SoC architects can edit generated topologies and also optimize each individual network router, if desired.
After a rigorous evaluation of nearly all commercial solutions, we determined that Arteris FlexNoC interconnect IP was the only NoC technology that would meet all our requirements.
Dr, Daofu Liu, Vice President, Cambricon
Arteris FlexNoC interconnect IP is the only interconnect that would allow our AI chips to achieve their high bandwidth requirements while also meeting our QoS requirements. Using Arteris NoC technology allows our architecture to take maximum advantage of state-of-the-art HBM2 memories to avoid system-level data starvation, which is major problem with less efficient AI training chips.
Arthur Zhang, COO, Enflame
Numerous startups are attempting to develop SoCs for neural-network training and inference, but to be successful, they must have the interconnect IP and tools required to integrate such complex, massively parallel processors while meeting the requirements for high-bandwidth on-chip and off-chip communications. Arteris IP has the experience and interconnect IP to help these companies succeed, and FlexNoC 4 with the AI Package provides the features required for AI chips in an easy-to use and highly configurable form.
Mike Demler, Senior Analyst & Senior Editor, The Linley Group & Microprocessor Rerport
