Magillem™ Registers offers a single source of truth methodology based on the IP-XACT standard, which not only targets the traditional need to manage registers, but also addresses today’s HW/SW integration challenges for large-scale SoCs.
Magillem Registers enables quick and scalable automated implementation, cutting the time to market for the Hardware/Software Interface (HSI) generation in half.
Magillem Registers translates the specification of registers into executable design code by automatically importing the register descriptions from different sources and formats into IP-XACT.
Generated data is always consistent and complete, which allows the verification team to always have an up-to-date generated register model to work from.
Magillem Registers supports customizable generators in addition to the automatic generation of standard output formats:
Synchronizing connectivity and memory map information with full integration of Magillem Registers and Magillem Connectivity:
Intuitive yet powerful GUI cuts learn curve and eases adoption
Define and customize importer/exporter/register property definitions for seamless integration
Use on up to 100Ks registers plus large-scale SoC memory maps
Reduce tedious and error-prone tasks with fully-automated flow and shorten the overall process
Count on a single source of truth with HW, SW and documentation all in sync to ensure accuracy and cross-team consistency
Catch errors at the data entry stage with the memory map information before running any simulation
Accelerate the schedule with a correct-by-construction SW interface
We automatically generated 2 Million lines of register header files for just one chip! And we automated
much of our Linux device tree and low-level firmware development.