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Arteris has a long history of improving what is possible in SoC design. Join us to make a difference creating IP for the world's best and most important chip design teams.

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Careers

Arteris offers a dynamic and challenging work environment for experienced professionals. Our employees receive competitive compensation and benefits, and the ability to be an important part of an increasingly larger global team at Arteris. We are on the leading-edge of the System-on-Chip (SoC) movement, and working with some of the world's largest and most technically advanced customers.

Join our outstanding team consisting of some of the most technically advanced engineers and help develop the industry's emerging standard for on-chip traffic transport and management for complex, IP-laden SoC designs.

Principals only please.  We are not accepting resumes from agencies at this time.

Available positions:

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Software Engineering Manager in Campbell, CA

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EDA Software Developer in Campbell, CA

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Design Verification Engineer in Campbell, CA

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Ingénieur d’Application – Solution Architect à Paris (Guyancourt), France

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EDA Software Developer - PIANO in Campbell, CA

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Software Architect in Campbell, CA

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Ingénieur Vérification en Électronique Numérique á Paris, France

Software Engineering Manager

Campbell, CA, USA

Would you like to be part of a team contributing to products that will be used in the next-generation of advanced smartphones, automobiles and other computing devices?

This management position reporting to the VP of Engineering requires a dynamic and self-motivated individual with excellent organizational, and technical skills who can effectively communicate across all levels of management. The ideal candidate will be an experienced leader who is visionary, strategic, technology savvy and skilled in contemporary software technologies and architectures. He will own and drive both development and quality engineering across multiple development teams.

The software engineering manager will assist in the implementation of short and long term projects to achieve strategic company goals. This role will regularly interact with the executive management staff to ensure said objectives are met. Candidates must have the ability to influence thinking or gain acceptance of others in potentially sensitive situations. A thorough understanding of product development and excellent people management skills is also critical.

Responsibilities:

Manage Arteris’ software team including UI, database, hardware language and other software functions.

Specific responsibilities include:

  • Collaborate with other Arteris engineering leaders in the evaluation and selection of high-level language for the description/design of Arteris’s next-generation interconnect IP.
  • Specify and/or create tools and environment for the development of interconnect IP elements.
  • Create the customer-facing UIs, tools and environment that allow customers to configure, verify, simulate, tune, and instantiate their interconnect IP.
  • Specify and/or create tools, environments and models for system level modelling and simulation.
  • Functional and performance simulation of full interconnect solution using both transaction-level and processor/software-driven models
  • Contribute both individually and as a leader to the software team
  • Develop team members and mentor more junior ones

 Qualifications:

  • Skilled hands-on individual contributor and engineering leader
  • Ability to create an efficient, maintainable software development environment and product software architecture
  • Knowledge of modern software development methodologies (eg Agile/Scrum), configuration/release management and quality assurance
  • Strong background in software development in connection with delivery of hardware and/or IP products, including internal tools/environments for hardware development and/or customer-facing UIs/tools/environments (eg EDA or EDA-like software)
  • In-depth knowledge of at least one modern object oriented language such as C++, Java, Python.
  • Familiarity with software modelling/simulation of hardware utilizing SystemC and/or TLM
  • Knowledge of scripting languages; i.e., Python, Tcl, Perl, Ruby, et. al.

Experience:

  • BS/MS in Computer Science; or in another engineering/technical discipline with equivalent experience
  • Minimum 10 years industry experience, ideally with SoC/IP experience
  • Minimum 5 years’ experience as a software engineering director or senior manager
  • Track record of successful delivery of internal and/or external software products
  • Prior start-up experience

Desirable:

  • Familiarity with model-driven software architectures and frameworks such as Eclipse Modelling Framework (EMF)
  • Familiarity with ARM/MIPS processors/architectures/ecosystems, standard third-party IP interfaces, and/or chip/SoC design
  • Knowledge of cache coherency in multi-processor systems
  • Experience working from a “blank sheet of paper”
  • Experience with development/delivery of software in support of chip, SoC and/or chip IP design
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EDA Software Developer

Campbell, CA USA

Are you a professional with experience in a diverse set of language concepts? Would you like to be part of a team contributing to products that will be used in the next-generation of advanced smartphones, automobiles and other computing devices?

In this role, you will be a member of a software development team creating leading-edge applications using web technologies for the semiconductor IP industry, and your work will include desktop applications, web-based applications, and hardware design infrastructure development. You’ll contribute to the tools used to create some of the world’s most sophisticated silicon designs, and you’ll find that your work ends up in places you never imagined.

You will have the opportunity to be part of a proven, successful startup and to influence development environment, architecture, verification and everything in between. You’ll no longer be stuck in a silo or just a cog in the machine. Your co-workers will be an experienced team of industry experts who love what they do.

Required:

  • 5 or more years’ experience as an EDA developer
  • 3 or more years C++ programming experience
  • Algorithms background and track record of implementation
  • Understanding of block and or cell level placement algorithms

Desired:

  • Familiarity with synthesis, place and route tools, and how they achieve timing convergence
  • Exposure to dynamic programming languages such as Python and JavaScript
  • Has implemented tools and/or algorithms for STA (Static Timing Analysis).
  • Some experience in GUI programming a plus
 Apply Now!

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Design Verification Engineer

Campbell, CA, USA

Do you want to contribute to the backbone of the some of the world's most popular SoCs? Are you ready to do more than just own a block?

At Arteris, you will have an exceptional opportunity to be part of a verification team working on highly configurable interconnect & memory hierarchy solutions for some of the world's most sophisticated mobile, telecom, automotive, and consumer SoC designs. You will have the opportunity to be part of a proven and successful startup, and to influence our development environment, architecture, verification, and everything in between. You’ll no longer be stuck in a silo or just a cog in the machine. And your co-workers will be an experienced team of industry experts that love what they do.

Requirements:

  • BS/MS in EE, CE, CS; or in another engineering/technical discipline with equivalent experience
  • Minimum 8 years of design verification experience verifying complex SoCs/ASICs at the system level
  • Cache Coherency experience is desired, but not required
  • Proficiency with Verilog/VHDL and scripting languages such as Python, TCL, Perl, Ruby, etc.
  • Experience developing test plans
  • Strong experience developing verification infrastructure using UVM
  • Familiarity with the use of third-party VIPs/AIPs
  • Team player with strong communication skills, and ability to work independently on the verification of a portion of the design.

Desired:

  • Prior microprocessor (CPU) and/or L1/L2 cache coherency and memory subsystem verification experience
  • Familiarity with interfaces like AXI, OCP, PCIe, etc.
  • Formal verification experience writing properties and stimulus generation
  • Prior start-up experience.
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Ingénieur d’Application - Solution Architect

Paris (Guyancourt), France

Description de l'entreprise:

Arteris est une entreprise très innovante et dynamique, qui compte plus de soixante-dix collaborateurs dans le monde, avec de nombreux clients en Europe supportés depuis son bureau de Guyancourt. L’entreprise développe et commercialise une technologie de réseau sur puce (NoC) qui est utilisée dans un grand nombre de circuits intégrés numériques complexes, dans tous les domaines : communication, automobile, stockage, etc.

Leader sur son marché, Arteris offre un environnement de travail unique et stimulant, dans un esprit de “startup” de la Silicon Valley, où est situé son siège social.

Description de l'emploi:

Ce poste est en contrat à durée indéterminée (CDI).

Vous serez amené à travailler au sein d’une équipe d’ingénieurs d’application et à devenir expert de la technologie de Network-on-Chip (NoC) Arteris, destinée aux System-on-Chip (SoC) les plus avancés de l’industrie. Votre bonne compréhension du design numérique, de la définition d’architecture de SoC jusqu’à l’implémentation, votre enthousiasme pour la technologie, votre créativité, vos capacités à résoudre des problèmes, et vos capacités de communication, font de vous un élément clé de l’équipe. 

  • Etre identifié par les clients comme un expert des interconnects pour System-on-Chips 
  • Aider les clients à tirer le meilleur parti de la technologie NoC de Arteris
  • Fournir de l’expertise technique aux forces de vente pour démontrer aux clients la valeur du produit 
  • Faire l’interface entre les clients et la R&D pour faire remonter les demandes d’améliorations et fournir une bonne compréhension des besoins clients

Profil:

  • Ingénieur microélectronique avec 5 ans d'expérience en conception numérique minimum
  • Bonne connaissance du Verilog et des outils de conception microélectronique numérique avancé. 
  • Compréhension de l’architecture des System-on-Chip type Application Processor ou Modem
  • Bonne connaissance du protocole AMBA AXI 3 & 4 
  • Capacité à travailler en équipe, créativité
  • Environnement international : bonne maîtrise de l’anglais

Ce poste implique des voyages à hauteur de 20% du temps environ.

 Apply Now!

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EDA Software Developer - PIANO

Campbell, CA USA

Are you a professional with experience in a diverse set of language concepts? Would you like to be part of a team contributing to products that will be used in the next-generation of advanced smartphones, automobiles and other computing devices?

In this role, you will be a member of a software development team creating leading-edge applications using web technologies for the semiconductor IP industry, and your work will include desktop applications, web-based applications, and hardware design infrastructure development. You’ll contribute to the tools used to create some of the world’s most sophisticated silicon designs, and you’ll find that your work ends up in places you never imagined.

You will have the opportunity to be part of a proven, successful startup and to influence development environment, architecture, verification and everything in between. You’ll no longer be stuck in a silo or just a cog in the machine. Your co-workers will be an experienced team of industry experts who love what they do.

Required:

  • 5 or more years’ experience as an EDA developer
  • 3 or more years C++ programming experience
  • Algorithms background and track record of implementation.
  • Understanding of block and or cell level placement algorithms and STA (Static Timing Analysis).
  • Familiarity with synthesis, place and route tools, and how they achieve timing convergence
  • Quadratic placement force-directed placement
  • ILP (integer linear programming)
  • Timing closure experience

Desired:

  • Exposure to dynamic programming languages such as Python and JavaScript
  • Has implemented tools and/or algorithms for STA (Static Timing Analysis).
  • Some experience in GUI programming

 APPLY NOW!

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Software Architect

Campbell, CA USA

Arteris is looking for an experienced Software Engineer to participate in the architecture and design of its next generation interconnect design and optimization software.

A successful candidate will be able to design and implement solutions to some of the most challenging hardware interconnect problems.

Within our team, you will be exercising your skills for the creation of a modular plug-in based client-server application that will power the creation of some of the most complex SoCs in the world.

Our current product is powering the creation of the most advanced artificial intelligence, mobile phone, and self-driving car SoCs.

Required:

  • Proven experience in the design and build of software frameworks (Preferably with GUI component)
  • Solid software knowledge base:
    • Data structure and Algorithmic
    • Understanding of SW system design
    • Extensive Object-Oriented design experience
    • Expert knowledge of one of the OO programming languages (C++, Java …)
    • Working experience with at least one scripting language
  • EDA background, ability to understand the basic paradigms of the hardware design process.
  • 10+ years of relevant experience

Desired:

      • Client-server software implementation experience
      • JavaScript and NodeJS experience
      • GUI development experience
      • EDA placement or timing experience

 APPLY NOW!

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Ingénieur Vérification en Électronique Numérique

Paris (Guyancourt), France

Description de l'entreprise:

Arteris est une entreprise très innovante et dynamique, qui compte une cinquantaine de personnes dans le monde, avec de nombreux clients en Europe, supportes depuis son bureau de Guyancourt. L’entreprise développe et commercialise une technologie de réseau sur puce (NoC) qui est utilisée dans un grand nombres de circuits intégrés numériques complexes, dans tous les domaines : communication, automobile, stockage, etc.

Leader sur son marche, Arteris offre un environnent de travail unique et stimulant, et offre à ses employés un esprit de “startup” de la Silicon Valley, ou est situé son siège social.

Poste et missions:

Vous serez amené à valider des blocks d’IP pour une technologie de Network On Chip (NoC) destinées aux System On Chip (SoC) les plus avances de l’industrie.

  • Définition du plan de test/validation
  • Définition des points de couverture
  • Ecriture et/ou modification des tests et des environnements de test
  • Compréhension des problèmes de couverture de code, de vérification de composants paramétrables
Profil:
  • Ingénieur vérification microélectronique de 4 ans d'expérience minimum
  • Connaissance SystemVerilog et de UVM (Universal Verification Methodology).
  • Connaissance des protocole AMBA et des VIP (Verification IP) pour AMBA
  • Compréhension des techniques de design Verilog ou VHDL
  • Connaissance des langages Python, C++, SystemC est un plus
  • Capacité à travailler en équipe, créativité
 Apply Now!

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