Safety & Reliability Begin with 
FlexNoC Resilience Package

The FlexNoC Resilience Package complements FlexNoC fabric IP and implements hardware reliability & functional safety features required for automotive ISO 26262 or IEC 61508 compliance, and enhanced enterprise SSD endurance. 

  Download ISO 26262 Certification paper

The SoC Foundation of Functional Safety & Reliability

flexnoc resilience protected data ECC

For complex SoCs in advanced process nodes, CPU duplication and memory protection logic are no longer sufficient to address all the metrics required to meet the more stringent ISO 26262 ASIL and IEC 61508 SIL levels. Data traffic must now be protected throughout the chip floorplan.

The Arteris FlexNoC Resilience Package provides hardware-based data protection for increased SoC reliability and functional safety.

In addition to providing functional-safety compliant IP, Arteris is working closely with YOGITECH S.p.A. to create a set of deliverables which can be used as a starting point in the preparation of ISO 26262 work products.

Implementing functional safety and data protection features in hardware is easier and less risky than software-only implementations.

  Download datasheet   Download SSD Tech Paper

We have worked with Arteris NoC technology since 2010, and are excited that Arteris has brought its significant engineering prowess to help solve the problems of fault tolerant and reliable SoC design.

Elchanan Rushinek, Vice President of Engineering, Mobileye

Hardware IP functional safety is better than software because:

  1. Reduced Complexity – Software takes much more effort to develop and maintain than certifiable hardware IP;
  2. Improved Quality – Hardware IP is pre-tested and can be pre-certified while future software quality presents risk;
  3. Enhanced Control – Semi vendors set a baseline of safety features that must be implemented which is less risky than low grade software developed without knowledge, input or feedback.

FlexNoC Resilience Package features include:

  • Data protection through error-correcting code (ECC) and parity checking
  • Out-of-the-box support for ARM Cortex-R5 and Cortex–R7 Processor Port Checking
  • Unit protection by duplication and redundancy
    • Similar to dual-core lockstep (DCLS) and often required for ASIL C or D systems as specified in the automotive ISO 26262 standard
  • Duplicate unit checkers and fault safety controller
  • Built in Self-Test (BIST) for resilience functions
  • Data protection by monitoring
  • Data packet integrity checkers
  • Easy partitioning of any SoC into safe and non-safe domains.

Data protection is not just for Automotive!

Arteris customers include a wide range of companies developing SoCs for many markets including:

  Download SSD Tech Paper

What industry leaders say

Altera SoC FPGAs are architected to ensure customers have a solid foundation upon which to build their embedded systems, and using Arteris’ network-on-chip IP has helped us create a superior SoC FPGA. The Arteris FlexNoC Resilience IP will make it easier for Altera to implement more dependable SoC FPGAs for fault tolerant systems in the future.

Altera Logo
Ty Garibay, Vice President of IC Engineering, Altera

Arteris FlexNoC fabric IP has been our choice for SoC development since 2008. The data protection and redundancy features included in the FlexNoC Resilience Package will help us design and implement our fault tolerant SoCs faster and at a higher quality level than possible before.

Renesas Logo
Matthias Voigt, General Manager, Engineering Group, Renesas Electronics Europe

Arteris’ network-on-chip interconnect IP allows us to reduce the die size of Mobileye's 3rd generation vision processor, EyeQ3, optimize latency for critical IP blocks and reach timing closure much sooner than expected. We exhaustively benchmarked the Arteris NoC interconnect IP against the competition. We need real-time performance with extremely low latency between video IP blocks, and we found the Arteris NoC to be the best solution for EyeQ3. Furthermore, we found Arteris’ memory scheduler to be superior, with excellent Quality of Service in a smaller die area. With Arteris, our customers can be assured of responsiveness and reliability to help reduce collisions and make roads safer.

Elchanan Rushinek, Vice President of Engineering, Mobileye

A growing number (of semicondcutor vendors) are turning to safety- and security-optimized network-on-chip subsystems for SoCs, such as the FlexNoC Resilience Package, to lower the development costs and time it takes to achieve the ISO 26262 certification, enabling both media-intense processing and certifiable mission critical solutions in an integrated SoC.

IHS Logo
Tom Hackenberg, Automotive Embedded Processors Principal Analyst, IHS Technology

Available today

Contact Arteris today to start using the FlexNoC Resilience Package!


New SSD Endurance Paper!

  Download now!

"Optimizing Enterprise-Class SSD Host Controller Design with Arteris FlexNoC Network-On-Chip Interconnect IP"