EDN: Why network-on-chip IP in SoC must be physically aware

Andy Nightingale, VP of Product Management at Arteris, authored this EDN article.

February 10th, 2023 – By Andy Nightingale

Today, multicore system-on-chip (SoC) designs can be composed of hundreds of IP blocks, typically containing up to ten million logic gates. One way for SoC developers to create devices of this complexity is to make use of proven IP blocks provided by trusted third-party vendors. There’s no point in devoting thousands of hours to reinventing a USB 3.2 Gen x interface, for example, when it is already available as off-the-shelf IP. Instead, engineers can focus their efforts on creating their own internal IP that will differentiate their SoC from any competitive offerings.

To read the full article on EDN, click here.