Electronic Design Article: Physically Aware Network-on-Chip Streamlines SoC Design Cycle

by Arteris Marketing, On Mar 07, 2023

Andy Nightingale, VP Product Management & Marketing at Arteris, talks with William G. Wong in this Electronic Design video.

February 22nd, 2023 – by William G. Wong

Arteris IP has released FlexNoC 5, a network-on-chip (NoC) IP configuration tool, designed to improve system-on-chip (SoC) designs and streamline the design cycle. I spoke with Arteris IP’s VP of Product Development, Andy Nightingale, about the company’s physically aware NoC IP (see video above). The system is designed to provide an optimized, working NoC layout while significantly reducing the design-cycle time.

To watch the video and read the full article on Electronic Design, click here.

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