Arteris Articles

Semiconductor Engineering: Planning For Failures In Automotive

 Arteris IP's Kurt Shuler, VP of Marketing, comments on Bigger Chips in this latest Semiconductor Engineering:

Planning For Failures In Automotive

November 7th, 2019 - By Ann Steffora Mutschler

semiconductor-engineering-logo-LinkedIn-Post

With more consolidation of functions within the ECUs in vehicles, the chips are getting bigger.

 In fact, they’re much larger and more sophisticated than
any chip in a cell phone, and have many more brains on it, noted Kurt Shuler, vice president of marketing at Arteris IP. “They’re more like something you would find in a data center, but it’s in your car. It’s got to sip power from a battery and it can’t have too much heat, so they’ve got all these different challenges. Then, if you look at the design teams that do this stuff, as design approaches change to anticipate failures, this is the reason why the traditional semiconductor companies are having trouble adapting — companies that have been incumbents and have done automotive chips for years.”

The ISO 26262 spec has been adapted to accommodate this in that fault injection can be done at a higher level than post synthesis, and can be run at the RTL functional level. “Still, getting some of the automotive guys to accept that this is acceptable is a challenge, but it’s progressing,” he added.

You can learn more by going to the Arteris IP Resources page and download presentations, technical papers, and view videos here; https://www.arteris.com/resources

To read the entire article on the SemiEngineering page, please click here: https://semiengineering.com/in-system-networks-are-front-and-center/

Topics: SoC functional safety ISO 26262 semiconductor engineering AI kurt shuler noc interconnect SOTIF (ISO 21448 bigger chips