Arteris Articles

SemiWiki: What are SOTIF and Fail-Operational and Does This Affect You?

Kurt Shuler, VP Marketing at Arteris IP, and Bernard Murphy (SemiWiki) discuss Safety of the Intended Function (SOTIF) in this latest SemiWiki blog:

What are SOTIF and Fail-Operational and Does This Affect You?

May 22nd, 2019 - By Bernard Murphy

Standards committees, the military and governmental organizations are drawn to acronyms as moths are drawn to a flame, though few of them seem overly concerned with the elegance or memorability of these handles. One such example is SOTIF – Safety of the Intended Function – more formally known as ISO/PAS 21448. This is a follow-on to the more familiar ISO 26262. 

When you’re zipping down a busy freeway at 70mph and a safety-critical function misbehaves, traditional corrective actions (e.g., reset the SoC) are far too clumsy and may even compound the danger. You need something the industry calls “fail operational”, an architecture in which the consequences of a failure can be safely mitigated, possibly with somewhat degraded support in a fallback state, allowing for the car to get to the side of the road and/or for the failing system to be restored to a working state. According to Kurt Shuler (Arteris VP of marketing and an ISO 26262 working group member), a good explanation of this concept is covered in ISO 26262:2018 Part 10 (chapter 12, clauses 12.1 to 12.3). The system-level details of how the car should handle failures of this type are decided by the auto OEMs (and perhaps tier 1s) and the consequences can reach all the way down into SoC design. Importantly, there are capabilities at the SoC-level that can be implemented to help enable fail operational.

For more information, please visit the Arteris IP AI package webpage: http://www.arteris.com/flexnoc-ai-package

Topics: SoC semiconductor semiwiki kurt shuler flexnoc ai package ISO PAS 21448 noc interconnect SOTIF (ISO 21448

SemiWiki: ML and Memories: A Complex Relationship

Kurt Shuler, VP Marketing at Arteris IP, helped Bernard Murphy (SemiWiki) learn the multiple ways that different types of memory need to connect to these accelerators in the latest SemiWiki blog:

ML and Memories: A Complex Relationship

March 13th, 2019 - By Bernard Murphy

How do AI architectures connect with memories? The answer is more complex than in conventional SoC architectures.

No, I’m not going to talk about in in-memory-compute architectures. There’s interesting work being done there but here I’m going to talk here about mainstream architectures for memory support in Machine Learning (ML) designs. These are still based on conventional memory components/IP such as cache, register files, SRAM and various flavors of off-chip memory, including not yet “conventional” high-bandwidth memory (HBM). However, the way these memories are organized, connected and located can vary quite significantly between ML applications.

For more information, please visit the Arteris IP AI package webpage: http://www.arteris.com/flexnoc-ai-package

Topics: semiconductor artificial intelligence semiwiki kurt shuler flexnoc ai package noc interconnect cache coherence

SemiWiki: Segmenting the Machine-Learning Hardware Market

Kurt Shuler, VP Marketing at Arteris IP, shares his 91 entries into finding every company and product that is active in the AI hardware space in this latest SemiWiki blog:

Segmenting the Machine-Learning Hardware Market

March 13th, 2019 - By Bernard Murphy

Machine learning is everywhere, but it can be difficult at times to understand what that really means. Bernard Murphy (SemiWiki) talked to Kurt Shuler and dug through a very detailed spreadsheet Kurt developed to understand better better what is being used where in the ML market.

One of the great pleasures in what I do is to work with people who are working with people in some of the hottest design areas today. A second-level indirect to be sure but that gives me the luxury of taking a broad view. A recent discussion I had with Kurt Shuler (VP Marketing at Arteris IP) is in this class. As a conscientious marketing guy, he wants to understand the available market in AI hardware because they have quite a bit of activity in that space – more on that later. So Kurt put a lot of work into finding every company and product he could that is active in this space, 91 entries in his spreadsheet. This he broke down by company, territory (eg China or US), product, target market (eg vision or speech), implementation (eg FPGA or ASIC), whether the product is used in datacenters or at the edge and whether it is being used for training or inference. 


 For more information, download this FlexNoC AI Package datasheet; http://www.arteris.com/flexnoc-ai-package

Topics: FPGA semiconductor edge computing semiwiki inference kurt shuler flexnoc ai package AI training noc interconnect

SemiWiki: Safety: Big Opportunity, A Long and Hard Road

Kurt Shuler, VP Marketing at Arteris IP, explains the support and business cycle from the vendor to the integrator in the latest SemiWiki blog written by Bernard Murphy:

Safety: Big Opportunity, A Long and Hard Road

February 27th, 2019 - By Bernard Murphy

Still think you want to sell IP into the automotive chain? Bernard Murphy (SemiWiki) distills Kurt Shuler insights into what this takes. There’s certainly a lot of promise. More big chips in the central brain and in intelligent sensors together offer a lot of opportunity. The US, Europe and Israel markets are all very aggressive in developing ADAS and ML. China has been a laggard but is coming on strong and is not held back by legacy so much. They also see a big tie-in with AI where they are very strong. Kurt says there are more than a couple of hundred funded startups in automotive and AI in China.

That said, this is not an easy way to get rich. You’ll have to put a lot of investment into supporting your customers, supporting their customers and so on up to the top. The market is very dynamic, so what “done” means may not always be clear. You may not be paid for quite a long time. But if you have the grit to hang on and keep your customer happy the whole way through, you might just be successful!


 For more information, download this FlexNoC AI Package datasheet; http://www.arteris.com/flexnoc-ai-package

Topics: ISO 26262 semiconductor semiwiki kurt shuler flexnoc ai package noc interconnect ML-centric design