Arteris Ncore cache coherent interconnect featured in Microprocessor Report (MPR)

by Kurt Shuler, On Jun 27, 2016

Microprocessor Report is published by the Linley Group and is one of the premier semiconductor analyst groups in our industry. Many of our semiconductor design team customers rely on Linley Gwennap and his team when making strategic decisions. If you’re not already a MPR reader, you should be!

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The article itself is more detailed than many of the other writing about Ncore, with technical implementation details on Ncore’s directory, multiple configurable snoop filters, and multiple configurable proxy caches.

Of course, the MPR article is not as detailed as our NDA-only technical deep-dive presentation, but you can receive that information simply by contacting us

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