Semiconductor Engineering: Safety Islands In Safety-Critical Hardware

by Madelyn Miller, On Nov 13, 2019

Safety Islands In Safety Critical Hardware

November 7th, 2019 – By Kurt Shuler

Semiconductor Engineering logoCreating a reliable place to manage critical functions when a design contains a mix of ASILs.

 

Safety and security have certain aspects in common so it shouldn’t be surprising that some ideas evolving in one domain find echoes in the other. In hardware design, a significant trend has been to push security-critical functions into a hardware root-of-trust (HRoT) core, following a philosophy of putting all (or most) of those functions in one basket and watching that basket very carefully. A somewhat similar principle applies for safety islands in safety-critical designs, in this case a core which will continue to function safely under all possible circumstances. The objective is the same – a reliable center for managing critical behavior, though from there the implementation details diverge.

For more information on this presentation and to download, please go here; https://www.arteris.com/download-arm-techcon-implementing-iso-26262-compliant-ai-systems-on-chip-with-arm-arteris

To read the entire article on the SemiEngineering page, please click here: https://semiengineering.com/safety-islands-in-safety-critical-hardware/

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