Arteris Adds Support for Tensilica’s Dataplane Processor Core Interface

by Kurt Shuler, On Jul 07, 2010

SANTA CLARA, California – July 7, 2010 – Arteris™, Inc. and Tensilica®, Inc. today announced that Arteris’ Network-on-Chip (NoC) technology for on-chip communications now fully supports Tensilica’s Xtensa® Processor Interface (PIF). This support will make it much easier for designers to get maximum efficiency when integrating Tensilica’s dataplane processing units (DPUs) into their system-on-chip (SOC) designs. Using Arteris’ NoC technology, Tensilica’s DPUs can be mixed and matched with other processor cores or RTL blocks in complex, high-throughput designs. Tensilica’s DPUs are often used in multi-core chip designs, performing valuable data processing functions such as audio, video and baseband communications.

Tensilica logo


“Now, with Arteris’ out-of-the-box support for the Xtensa PIF, our customers can quickly define a high-performance interconnect of multiple Xtensa processors.”

– Chris Jones, Director of Product Marketing, Tensilica

“Arteris’ Network-on-Chip technology is valuable for designers trying to integrate different functions and facing limitations on the number of resources that can effectively share a bus,” stated Chris Jones, Tensilica’s director of product marketing. “Now, with Arteris’ out-of-the-box support for the Xtensa PIF, our customers can quickly define a high-performance interconnect of multiple Xtensa processors.”

“By adding native Tensilica support, we’re broadening the number of processor cores we can effectively support with our NoC technology,” stated Charlie Janac, president and CEO of Arteris. “The interconnect design is the key component of the SOC integration, and the more flexible the options available to the designer, the better the resulting SOC design.”

Support for the Arteris NoC adds to the already impressive number of interconnect options for Xtensa processors, from the user configurable PIF, to industry standard AMBA buses, to novel, high performance, user-defined, point-to-point queue interfaces.

About Arteris

Arteris, Inc. provides semiconductor interconnect IP and tools to improve communication performance of ICs for a wide range of applications. Results obtained by using Arteris IP product line include lower power, higher performance, efficiency of development and faster delivery of simple to complex ICs, SoCs and FPGAs.

Founded by networking experts, Arteris operates globally with headquarters in Sunnyvale, California and an engineering center in Paris, France. Arteris is a private company backed by a group of international investors including ARM Holdings, Crescendo Ventures, DoCoMo Capital, Qualcomm Incorporated, Synopsys, TVM Capital, and Ventech. More information can be found at

Arteris and the Arteris logo are trademarks of Arteris, Inc.

About Tensilica

Tensilica, Inc. is the leader in customizable dataplane processors IP cores. Dataplane Processor Units (DPUs) combine the best capabilities of CPUs and DSPs while delivering 10 to 100x the performance because they can be customized using Tensilica’s automated design tools to meet specific signal processing performance targets. Tensilica’s DPUs power SOC designs at system OEMs and five out of the top 10 semiconductor companies for products including mobile phones, consumer electronics devices (including digital TV, Blu-ray Disc players, broadband set top boxes, digital still cameras and portable media players), computers, and storage, networking and communications equipment. For more information on Tensilica’s patented, benchmark-proven DPUs visit Tensilica.

Tensilica and Xtensa are registered trademarks belonging to Tensilica Inc.