Arteris Articles

SemiWiki: Safety and Platform-Based Design

Kurt Shuler, VP Marketing at Arteris IP, updates Bernard Murphy of SemiWiki on some of the ways that safety and platform-based design interact, particularly where fail-operational functionality is required in autonomous or semi-autonomous systems, in this new SemiWiki blog:

Safety and Platform-Based Design

October 22nd, 2019 - By Bernard Murphy

Platform-based design, an approach to easily support multiple derivatives, opens some interesting new twists for safety-centric design. 

Bernard was at Arm TechCon as usual this year and one of the first panels he covered was close to the kickoff, hosted by Andrew Hopkins (Dir System Technology at Arm), Kurt Shuler (VP Marketing at Arteris IP) and Jens Benndorf (Managing Dir and COO at Dream Chip Technologies). The topic was implementing ISO 26262-compliant AI SoCs with Arm and Arteris IP, highly relevant since more and more of this class of SoC are appearing in cars. One thing that really stood out for me was the value of platform-based design in this area, something you might think would be old news for SoC design but which introduces some new considerations when safety becomes important.

You can learn more about this design by downloading the Arm TechCon presentation HERE.

Topics: SoC ARM semiconductor automotive automotive functional safety ArterisIP ISO 26262 compliance artificial intelligence AI semiwiki kurt shuler noc interconnect AI SoCs ASIL compliance

EE Times article, The Age of the Monster Chip

K. Charles Janac, President and CEO, at Arteris IP, authored this article on what is now defined as a "Monster Chip".

September 19, 2019 - by K. Charles Janac

What are the system designs that require a leap in SoC complexity? It’s not only big datacenter artificial intelligence (AI) chips, but also autonomous vehicles such as cars, trucks and drones; they are self-landing, reusable rockets; they are medical devices carrying out remote diagnostics; and they are connected machine tool controllers supporting smart manufacturing.

These chips are starting to be referred to as “Monster Chips” because of both the size and complexity.

Topics: semiconductor ADAS eetimes autonomous driving AI K. Charles Janac SoCs noc interconnect data center automation blockchain big chips

Semiconductor Engineering: In-System Networks Are Front And Center

 Arteris IP's Kurt Shuler, VP of Marketing, authored this article and offers his perspective on HotChips 2019 in this latest Semiconductor Engineering:

In-System Networks Are Front And Center

September 15th, 2019 - By Kurt Shuler

AI demands push innovation in design architectures and techniques.

 

This year’s HotChips conference at Stanford was all about artificial intelligence (AI) and machine learning (ML) and what particularly struck me, naturally because we’re in this business too, was how big a role on-chip networks played in some of the leading talks.

Giant leaps are being made in supporting new AI architectures, tuning them for optimum performance per milliwatt and embedding them effectively into traditional and novel SoC architectures.

You can learn more by reading my white paper titled, "Re-Architecting SoCs for the AI Era". Download is free; https://www.arteris.com/download-re-architecting-socs-for-the-ai-era

Topics: SoC functional safety ISO 26262 machine learning cache coherency semiconductor engineering AI kurt shuler noc interconnect SOTIF (ISO 21448 Hot Chips bigger chips

Semiconductor Engineering: Autonomous Vehicles Are Reshaping The Tech World

 Arteris IP's Kurt Shuler, VP of Marketing, comments on ISO 26262 and the need to add SOTIF for the unknown-unkown errors in this latest Semiconductor Engineering article:

Autonomous Vehicles Are Reshaping The Tech World

September 5th, 2019 - By Kevin Fogarty

Even before fully autonomous vehicles blanket the road there is major upheaval at all levels of the industry.

 

Until recently, the V-system testing of ISO 26262 has been the primary functional safety method for verification and validation. It will continue to play that role, according to Kurt Shuler, vice president of marketing at Arteris IP, but it will be supplemented by other types of testing such as SOTIF (safety of the intended functionality, ISO 21448).

“SOTIF was a little controversial,” Shuler said. “It almost didn’t get passed because of what I call the philosophical element. It is designed to find faults when things are working correctly, but it also finds errors that you don’t know about. The way it goes about that is a little different from the usual approach, but there are also standards coming from SAE and others from ISO, so there will be plenty of competition for this kind of challenge to be able to verify probabilistic systems.”

For more information, please visit our Resources page for free downloads of our technical papers; http://www.arteris.com/resources

Topics: SoC ISO 26262 autonomous driving ArterisIP FlexNoC semiconductor engineering AI kurt shuler noc interconnect SOTIF (ISO 21448