EDA Cafe: Arteris IP Extends IP-XACT to UVM Testbenches

by Madelyn Miller, On Jul 07, 2021

Vincent Thibaut, Director of IP Deployment Product Strategy at Arteris IP authored this new article for EDA Cafe:

Arteris IP Extends IP-XACT to UVM Testbenches

July 2, 2021 – By Vincent Thibaut

To be clear, the goal here is not to autogenerate the internals of the complex test sequences. However, the IP-XACT platform from Arteris IP does handle register sequences. Instead, view the universal verification methodology (UVM) testbench as part of an assembly of the device under test (DUT), plus many complex VIPs. IP-XACT lends itself nicely to this concept. To be effective, packaging needs several extensions so that configuration can be managed from the IP-XACT level. Testbenches will be challenged to include more and more VIPs as design complexity grows. There are compelling reasons to explore IP-XACT packaging for VIPs.

To read the entire EDA Cafe article, please click here: https://www10.edacafe.com/blogs/arterisip/2021/07/01/arteris-ip-extends-ip-xact-to-uvm-testbenches/

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