Learn why ArterisIP interconnect IP is the on-chip communications heart of cache coherent systems for autonomous driving, machine learning, neural networks and automotive sensor fusion.
ArterisIP enables system architects with the ultimate in configurability, scalability and performance.
The best technology: Multiple configurable snoop filters. Multiple configurable proxy caches. Multiple configurable voltage and clock domains. All using a modular, distributed architecture for easier timing closure and place & route.
Not just your design schedule, but also SoC performance
ArterisIP interconnect IP helps your products simultaneously achieve higher design frequencies, lower latency and lower power consumption. Our easy-to-use configuration tooling combined with our automated simulation, model generation and verification features help shorten your design schedules.
Your company makes more money by creating higher performing products at lower cost, faster.
We are better than home-grown solutions. Better than any other commercial solution. Learn why the world's largest and best SoC design teams rely on Arteris IP for on-chip communications.
After a complete evaluation of available interconnect fabric IP products, Arteris FlexNoC was the clear choice. FlexNoC is the only SoC fabric that allows us to meet tight timing margins and achieve design frequency requirements. We are pleased with the increased productivity our design team has experienced using FlexNoC.
You can trust the world's most experienced semiconductor IP management team to help you reach your business and technology goals.
Charlie’s career spans 20 years and multiple industries including electronic design automation, semiconductor capital equipment, nanotechnology, industrial polymers and venture capital. He has played a leadership role in the formation of Cadence, HLD Systems and Brooks Automation.
Ty is a pioneer in SoC development, playing key roles in the development of CPU and SoC architectures at Motorola, Cyrix, SGI, Alchemy, ARM, TI, and Altera. Most recently, he led FPGA IC design at Intel after it acquired Altera in late 2015. Ty has authored and co-authored 34 patents.
Joe is a proven technology executive with 25+ years of experience. He served as an engineering manager at Intel and HP, and earned a MS in Electrical Engineering from Stanford, a BS in EE from University of California, Davis, and a MS in the Management of Technology.
David Mertens brings many years' experience selling intellectual property and semiconductors across multiple vertical markets. He has held sales leadership positions with a focus on IP licensing at Audience, Tensilica, Synopsys, Faraday & Zoran.
Michel Telera was previously the Director of Southern Europe for Verisity where he built the organization from its inception to over $11 million in sales. He has a 20-year record of serving major semiconductor vendors at Daisy, Viewlogic, Compass, and Avant!
Prior to Arteris, Kurt Shuler held senior marketing and product management roles at Intel, Texas Instruments, ARC International and two startups. He has extensive IP, software and semiconductor marketing experience in mobile, consumer and enterprise markets.
Prior to joining Arteris in 2012, Stéphane served as a financial auditor for 13 years at EY, one of the major global auditing firms. He managed international private and public mid-cap clients in various markets dealing with VC financing, IPOs and acquisitions.
Amy Miller has extensive experience in intellectual property licensing and the semiconductor industry. She has served as an attorney at Zoran, Tensilica and ARM. She completed her undergraduate studies at UCLA and earned her Juris Doctor at the Santa Clara University School of Law.