ArterisIP and ResilTech to Present at ISO 26262 Semiconductors Conference

Kurt Shuler, Nov 28, 2017

CAMPBELL, Calif. and PONTEDERA, Italy — November 28, 2017 — ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, and ResilTech S.R.L., the leader in resilient computing and functional safety for automotive systems, will jointly present at Automotive IQ’s Application of ISO 26262 to Semiconductors conference on December 5th through the 7th, 2017, in Munich, Germany.

As automotive systems-on-chip increase in size and complexity, it has become increasingly important to perform safety analyses using executable models of IPs, and to define standard formats to exchange information between IP suppliers and SoC integrators.

Resiltech logo
Francesco Rossi, Automotive Safety Solution Manager, ResilTech

The ArterisIP/ResilTech joint session is titled, “Challenges Adopting Fault Injection to Support Safety Analysis in Complex SoCs,” and will be presented by ISO 26262 specification working group members Kurt Shuler and Francesco Rossi. Shuler is Vice President of Marketing at ArterisIP, and Rossi is Automotive Safety Solutions Manager at ResilTech. Conference registration is available at this link.

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ArterisIP and ResilTech have a unique perspective on implementing safety confirmation measures like fault injection for complex systems because of their strong customer relationships with the world’s leading ADAS and autonomous driving system vendors. Their presentation will provide real-world insights on how to effectively scale up functional safety analyses to address the requirements of very large and complex systems which will be deployed in future autonomous vehicles.

“We are happy to share our learnings from the leading edge of functional safety analysis for autonomous driving systems-on-chip,” said Kurt Shuler, Vice President of Marketing at ArterisIP. “Our presentation with ResilTech will explain key insights into applying the ISO 26262 standard to highly complex automotive SoCs.”

“As automotive systems-on-chip increase in size and complexity, it has become increasingly important to perform safety analyses using executable models of IPs, and to define standard formats to exchange information between IP suppliers and SoC integrators,” said Francesco Rossi, Automotive Safety Solutions Manager at ResilTech. “New challenges result from SoC complexity, and we will discuss the pros and cons of different analytical approaches in this presentation.”

About ArterisIP

ArterisIP provides system-on-chip (SoC) interconnect IP to accelerate SoC semiconductor assembly for a wide range of applications from automobiles to mobile phones, IoT, cameras, SSD controllers, and servers for customers such as Samsung, Huawei / HiSilicon, Mobileye (Intel), Altera (Intel), and Texas Instruments. ArterisIP products include the Ncore cache coherent and FlexNoC non-coherent interconnect IP, as well as optional Resilience Package (functional safety) and PIANO automated timing closure capabilities. Customer results obtained by using the ArterisIP product line include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. For more information, visit www.arteris.com or find us on LinkedIn at https://www.linkedin.com/company/arteris.

About ResilTech

ResilTech provides services and solutions to ensure the safety and resilience of electronic and computer based solutions to a variety of critical applications and domains including Railways, Metrolines, Automotive and Industrial. Experts from ResilTech joined the activity of the ISO Working Group developing the Automotive Functional Safety standard ISO 26262 since the first edition (2011), and now they are involved in the second edition (2018). The support and solutions (based on own methodologies and automated processes and tooling) for Safety management, Safety processes definitions, Requirement Management, Hazard analysis, HW and SW Safety analysis, SoC level HW analysis of micro-architectures, Design/ development/ verification of STL (self-test libraries) for CPUs, RAM and Peripherals, FMEA and FMEDA have made ResilTech a competent and key partner to many actors in Automotive Safety. For more information see http://www.resiltech.com/.

Editorial Contacts

Kurt Shuler
ArterisIP
+1 408 470 7300
kurt.shuler@arteris.com

Francesco Rossi
ResilTech
+39 0587-212465
francesco.rossi@resiltech.com

Arteris, ArterisIP, FlexNoC, Ncore, PIANO, and the ArterisIP logo are trademarks of Arteris, Inc. All other product or service names are the property of their respective owners.