Arteris Achieves Major Milestone: 100th Customer
- Arteris
- 3 min read
Semiconductor companies accelerate adoption of Arteris Network-on-Chip (NoC) interconnect IP to create more efficient autonomous driving and AI chips
CAMPBELL, Calif. — June 26, 2018 — Arteris, the world’s leading supplier of silicon-proven commercial network-on-chip (NoC) interconnect intellectual property (IP), today announced that 100 customers have adopted its on-chip communication technologies in a wide variety of system-on-chip (SoC) designs for automotive, consumer electronics, artificial intelligence (AI) and server markets.
Earning our 100th customer is a result of our substantial technology lead, unsurpassed product quality, and highly experienced global support team.”
K. Charles Janac
President and CEO, Arteris
The FlexNoC and Ncore cache coherent interconnect solutions from Arteris play a vital role in the architecture development, design, and implementation of complex heterogeneous multicore SoCs. Arteris is especially critical in today’s leading-edge designs, which incorporate advanced technologies like machine learning and neural networks via hardware accelerators. Customers have chosen Arteris’ on-chip interconnect IP because it:
- Allows high bandwidth and low latency communications between hardware accelerators for custom algorithm processing using end-to-end quality-of-service (QoS) mechanisms encompassing advanced memory and data flow techniques. These capabilities enable next-generation state-of-the-art “supercomputers-on-a-chip” for artificial intelligence and autonomous driving.
- Increases system functional safety and reliability with integrated reporting and data protection capabilities. These features are integrated into the interconnect technology, implementing on-chip error code correction (ECC), hardware redundancy, built-in self-test (BIST) techniques, and a safety controller. This allows autonomous driving and advanced driver assistance system (ADAS) supercomputers-on-a-chip to more easily achieve ISO 26262 functional safety specification compliance.
- Enables low power consumption by implementing advanced clock gating and power management. Use of Arteris interconnects reduces power consumption for chips which include multiple processing elements, easing the deployment of the most advanced SoCs in cars and mobile devices.